Electrical-microfluidic Hybrid Devices
Epigem offers to assist customers with design and manufacture of polymer microfluidic modules and systems. Increasingly, such devices require more than just a passive microfluidic function (such as flow splitting or passive mixing).
Therefore with hybrid microfluidics we have developed the fabrication processes necessary for the integration of robust, PCB-like electrical circuit layers with the microfluidic devices.
About Electrical-microfluidic Hybrid Devices
Unlike glass or silicon devices, where the metal tracks are made by patterning thin sputtered films on top of the microfluidic layer Epigem’s technology uses an embedded construction for the circuit layers, allowing the metal tracks to be many microns thick, yet still have a planar surface.
This means that the tracks have a much lower line resistance, are less prone to cracking and are suitable for wire bonding or soldering. The planar surface enables microfluidic layers to be patterned or bonded directly on top of each electrical layer without any leaks.
Hybrid microfluidics device manufacturing is carried out in a cleanroom environment and is ISO9001:2015 quality assured. High volume manufacturing is available to provide customers with a complete service from prototype through to manufacture.
- Electrophoresis separation
- Particle sorting and trapping
- Cell sorting
- Capacitance / impedance sensing
Design guidelines for the electrical layer
|Size||Up to 200 x 200 mm|
|Trace thickness||3 to 6 μm|
|Metal surface finish (optional)||Electroless Ni + Au (surface will be gold)|
|Finish thickness||2 μm (above surface of board). Gold thickness = 0.06 μm.|
|Trace width||5 μm or larger so that aspect ratio <=1.|
|Gap between traces||Equal to or greater than trace width|
|Pad sizes||Must be smaller than 1 mm or made up of 1 mm or smaller sized features to prevent lifting during plating.|
|Photomasks||When feature size is less than 25 μm then a chrome on glass hard photomask is required. Above this size then a flexible photomask is used.|
|Background grid/waffle pattern||A background cross-hatch grid or spacer dot pattern is recommended in areas not covered by the circuit pattern so as to ensure uniform thickness of metal during plating. Epigem can advise or add this to your design as required.|
|Polymer insulator layer thickness||Equal to metal thickness|
|Surface flatness||Peak to valley less than 0.2 μm (without gold finish, gold finish adds 2 μm above the surface of the metal traces).|
|Adhesive layer thickness||20 μm|
|Carrier substrate||PMMA, PEEK|
|Placement||Electrical layer can be placed above or below a fluid circuit layer|
|Number of electrical layers||1 layer; or 2 layers separated by a microfluidic layer|
|Electrical vias between layers||Not available|
|Overcoat layer||Optional. Can be applied on top of electrical layer to isolate electrical layer from contact with fluids. Thickness between 0.5 μm and 100 μm|
|Solder mask layer||Optional on top of outer electrical layer|